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Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs Cover Image E-book E-book

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Record details

  • ISBN: 9783319023786
  • Physical Description: electronic
    electronic resource
    access
    remote
    XVIII, 245 p. 133 illus., 115 illus. in color. online resource.
  • Publisher: Cham : Springer International Publishing : Imprint: Springer, 2014.
Subject: Engineering
Computer science
Systems engineering
Engineering
Circuits and Systems
Processor Architectures
Semiconductors

Electronic resources


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24510. ‡aDesign-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs ‡h[electronic resource] / ‡cby Brandon Noia, Krishnendu Chakrabarty.
264 1. ‡aCham : ‡bSpringer International Publishing : ‡bImprint: Springer, ‡c2014.
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65024. ‡aProcessor Architectures.
65024. ‡aSemiconductors.
7001 . ‡aChakrabarty, Krishnendu. ‡eauthor.
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